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Silicon IP RTL Design Engineer

GoogleBengaluru, Karnataka, India

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
  • 5 years of experience in ASIC development with Verilog/SystemVerilog, VHDL, or Chisel
  • Experience in micro-architecture and design of IPs and subsystems
  • Experience to ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT)

Preferred qualifications:

  • Experience with scripting languages (e.g., Python or Perl)
  • Experience in SoC designs and integration flows
  • Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies
  • Knowledge of high performance and low power design techniques

About the job

Google's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets Google's standards of quality and reliability.

In this role, you will be part of a team developing cutting-edge ASICs used to accelerate machine learning computation in data centers. You will collaborate with members of architecture, verification, power and performance, physical design, etc to specify and deliver high quality designs for next generation data center accelerators. You'll solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

  • Own microarchitecture and implementation of IPs and subsystems.
  • Work with Architecture, Firmware, and Software teams to drive feature closure and develop microarchitecture specifications.
  • Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams.
  • Identify and drive power, performance and area improvements for the domains owned.

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Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.

If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

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