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Process Integration Engineer, Extended Reality

GoogleFremont, CA, USA

Minimum qualifications:

  • Bachelor's degree in Computer Science, Electrical Engineering, Physics, or a related field, or equivalent practical experience.
  • 4 years of experience working in semiconductor process development and integration, or 3 years of experience with an advanced degree.

Preferred qualifications:

  • PhD degree in Electrical Engineering, Chemical Engineering, Physics, Chemistry, Material Science, or a related field.

About the job

In this role, you will collaborate with engineering teams and plan projects to develop, troubleshoot, and implement a micro-LED display fabrication technology with initiative and problem solving in a clean-room wafer fab environment. You will focus on development and troubleshooting of process modules, design and execution of experiments, and analysis of experiment results.

Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.

The US base salary range for this full-time position is $147,000-$216,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

  • Develop and troubleshoot wafer fabrication process modules in a clean-room wafer fab.
  • Plan projects by working closely with device and process engineers to explore, develop, troubleshoot, characterize, and validate unit processes and process steps.
  • Drive the characterization of thin film materials in collaboration with the Failure Analysis team.
  • Path finding for critical new thin film processes, including demonstration of feasibility, tool specifications, vendor evaluations, and tool qualifications.

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Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.

If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

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