PCIe Silicon Validation Engineer, Google Cloud
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Minimum qualifications:
- Bachelor's degree in Electronic Engineering or Computer Engineering, or equivalent practical experience.
- 10 years of experience working with PLLs, PCIe, SerDes IPs.
- Experience in SerDes design and architecture, including CDR and equalization.
- Experience working with lab equipment such as BERT, real-time scopes, Spectrum Analyzers, VNA, or protocol analyzers.
- Experience in Tx/Rx equalization techniques and adaptation.
Preferred qualifications:
- Experience in PCIe compliance measurements using high-end equipment (e.g.,Analyzer, Exerciser).
- Experience with development using pre-silicon tools (e.g.,Field Programmable Gate Array (FPGA)/Emulator).
- Experience in lab equipment for PCIe testing (physical or protocol level).
- Knowledge of ARM based SoC architecture (e.g.,Boot flow, High-speed I/F initialization, memory allocation, etc.).
About the job
As a Serializer Deserializer (SERDES0)/Peripheral Component Interconnect Express (PCIe) Silicon Characterization Engineer, you will take ownership on characterization of SERDES analog IPs provided by external vendors. Your job is to assure that the IP is meeting Google high standards. The role involves working closely with different multi-functional teams within our Silicon organization, as well as external vendors. Occasional travel might be required.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Validate SERDES IPs, such as PCIeG6 PHYs, thoroughly.
- Write Inhouse tools/scripts to characterize the IP.
- Demonstrate the characterization, bench testing, debugging of analog/mixed signal on-chip circuitry (phase-locked loops (PLLs), Clocks, Data Converters and various I/O Interfaces).
- Develop electrical tests exercising on-chip circuitry through a combination of Joint Test Action Group (JTAG), Universal Asynchronous Receiver Transmitter (UART), Serial Peripheral Interface (SPI), and other analog interfaces.
- Draft and Execute scripts to automate tests, extract results, and generate reports using database and analytical tools
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