System Power/Performance Architect, Devices and Services, Silicon
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Minimum qualifications:
- Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 5 years of experience in SoC performance or power analysis, modeling and optimizations.
- Experience with SoC architectures and performance and power KPIs.
- Experience in software power optimizations (Android, Linux)
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with use case datapaths, IP-level and SoC-level performance KPIs and power management concepts.
- Experience with Camera and GenAI workloads and dataflows
- Experience with post-si power productization work
- Experience with Python or C++
- Knowledge of the impact of software and architectural design decisions on system performance, power and thermal behavior
About the job
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Responsibilities
- Architect and drive low power solutions for Google Tensor mobile SoCs to optimize Power-Performance-Area (PPA) under peak current and thermal constraints. Special focus on camera and GenAI use cases.
- Create use case workload and data and control flow models for use case power, performance, thermal and DoU (days-of-use) evaluation to drive Hardware and Software architecture definitions.
- Define power/performance Key Performance (KPIs) Indicators, set SoC/IP-level power/performance targets, guide cross-functional teams to achieve these targets, perform use case level power roll-ups and track KPIs through the design cycle.
- Drive power/performance what-if trade-off analysis to guide product roadmap and feature decisions.
- Perform post-silicon power and performance characterization, create power walks and guide cross-functional teams to land power and thermal targets in production.
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